A Survey on Hardware Neural Network (HNN)

dc.contributor.authorRaghad Abduljabbar Abdulhameed
dc.contributor.authorAbdullahi Abdu Ibrahim
dc.date.accessioned2026-01-02T12:08:33Z
dc.date.issued2023-02-13
dc.description.abstractHNN covers academic and commercial examples of Hardware Neural Network (HNN) prototypes to provide a comprehensive overview of AI hardware implementations (ANNs). Although HNN research has been continuing since the 1990s, commercialization has been slow. To assess the field's state, we look at the most important ANN models, hardware design methodologies, and applications. For a model to be useful in a broad variety of applications, it must be mapped onto reliable and energy-efficient hardware. Researchers are researching entire ANN models on chips (digital, analog, hybrid, and FPGA-based) and in the brain. Spiking neural network hardware, cell-based neuron implementations, and programmable FPGA-based solutions are all detailed. Associative neural memory, Additionally, bit-slice and SIMD architectures will be examined for RAM-based parallel digital implementations. Consider the current status of research and forecast the future
dc.formatapplication/pdf
dc.identifier.urihttps://geniusjournals.org/index.php/ejet/article/view/3342
dc.identifier.urihttps://asianeducationindex.com/handle/123456789/78646
dc.language.isoeng
dc.publisherGenius Journals
dc.relationhttps://geniusjournals.org/index.php/ejet/article/view/3342/2838
dc.rightshttps://creativecommons.org/licenses/by-nc/4.0
dc.sourceEurasian Journal of Engineering and Technology; Vol. 15 (2023): EJET; 4-12
dc.source2795-7640
dc.subjectHMM
dc.subjectSIMD
dc.subjectANN
dc.subjectFPGA
dc.titleA Survey on Hardware Neural Network (HNN)
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/publishedVersion
dc.typePeer-reviewed Article

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